The present invention relates to a method for dynamically reconfiguring data bus control by transferring the role of bus master between devices connected to the data bus, and more particularly relates to a data bus used in cell stations in a cellular telephone system.
Generally, a known cellular telephone system includes a central station and one or more cell stations. The cell stations are generally remote from the central station, and are usually distributed throughout a cellular telephone service area. The cellular telephone system may, for example, connect a cellular telephone user to the Public Switched Standard Network (xe2x80x9cthe PSTNxe2x80x9d) via one or more of the cell stations and the central station.
Cell stations are conventionally provided with various hardware components (sometimes called xe2x80x9ccircuit packsxe2x80x9d) to provide required functionality. These components may include, for example, controllers, clock boards, radios, and amplifiers.
Conventionally, a hardware controller, also provided in the cell station, controls the circuit packs in the cell station. The hardware controller and the circuit packs communicate with each other on a common data bus. Accordingly, the hardware controller acts as a bus master to ensure that all circuit packs have a chance to transmit and receive data from the data bus. In the conventional art, such a hardware controller has no function other than its bus master function. Accordingly, at minimum, it takes up space within a cell station. Since cell station miniaturization is desirable, the loss of usable space is a problem.
In addition, if the hardware controller fails, the unit must be replaced by a technician, causing undesirable down time for the cell station and call processing disruption.
Most generally, the present invention provides a method for dynamically reconfiguring control of a data bus.
In particular, according to the present invention, bus master functionality is provided by one or more types of the circuit packs that are already conventionally used in a cell station, whereby the use of a separate hardware controller is avoided. Moreover, the method according to the present invention recognizes when a circuit pack (which initially provides bus master functionality) becomes inoperative and effectively invisible to the data bus. Thereafter, data bus control is dynamically controlled so that another one of the circuit packs that can act as the bus master promotes itself to having bus master functionality. In this manner, the data bus is xe2x80x9cself-healing,xe2x80x9d so cell station downtime is avoided or at least reduced.
More specifically, each of the circuit packs periodically checks the logical addresses of their logical neighbors, especially the next highest logical address of a neighboring circuit pack. The circuit pack currently exercising bus master functionality is arbitrarily assigned the highest available logical address on the data bus. Accordingly, when the circuit pack having the next lower logical address sees a circuit pack having a logical address lower than itself (the address checking process cycling to the beginning of the address register once the highest address is reached), it recognizes that the circuit pack having bus master functionality has either been removed from the data bus or has otherwise become inoperative.
Once the loss of the bus master circuit pack is recognized, the next lowest circuit pack capable of acting as bus master assumes the role of bus master. In addition, that new circuit pack assumes the highest available logical address on the data bus.
An example of a data bus contemplated according to the present invention and discussed in detail below is a logical ring, especially a token passing ring. However, other known bus configurations are operable in accordance with the present invention, although other factors (e.g., processor demands) may be affected.
In a particular configuration of the present invention, disclosed herein by way of example, the data bus used is a token passing ring using the conventionally known ARCNet protocol.
An arrangement in which the circuit pack providing bus master functionality is arbitrarily assigned the lowest logical address on the data bus is also contemplated in accordance with the present invention. In this situation, each of the circuit packs checks the logical address of its logically next lower neighbor. Therefore, when the logically next higher circuit pack to the circuit pack providing bus master functionality detects a circuit pack having a logical address higher than itself, the data bus recognizes that the circuit pack that had been providing bus master functionality has been removed or has otherwise become inoperative. Therefore, the logically next highest circuit pack capable of acting as bus master promotes itself so as to actively function as the bus master.